ASU Research E-Magazine: Diving into the Silicon Chasm

ASU engineers and students are delving into a world of the infinitesimal, a nano-world where devices are no bigger than individual molecules.

In the center of Arizona State University’s main campus in Tempe, electrical engineering researchers are working hard to build silicon microchips of unprecedented miniaturization. The goal is a single chip of silicon etched with billions of transistors. Each transistor will store but a single electron.

David Ferry and Michael Kozicki have built an impressive laboratory. They are putting dozens of researchers to work investigating the properties of nanoscale devices. Nanoscale transistors are measured in billionths of a meter. The ASU electrical engineering professors and their students are learning how best to build these minuscule devices, investigating how they work, and trying to develop the most efficient means to make mass quantities of them.

The need for computing power is everywhere. As a result, microprocessors are everywhere. Computer chips are found in watches, calculators, and desktop computers; but also in cars, washing machines, and greeting cards (to play cheesy little tunes).

Transistors are inexpensive, and the payoffs from the application of a little computer intelligence can be great. Watches keep time accurately, with no winding. Cars start up immediately, adjust their fuel injection to the ambient temperature and altitude, and leave only a few wisps of fumes.

During the past 30 years, the pace of integrated circuit (electronic circuits in a single package) development has followed Moore’s Law, named after Gordon Moore, one of the founders of Intel. Back in the late 1960s, Moore said that every 18 months would see a doubling in the computational power available on a single silicon chip.

Of course, Moore’s Law is not a law of Nature. It depends—like other large projects in our history—on a confluence of factors. Needed are engineers trained to build the devices; the money to build them, and the social will that judges such an endeavor important.

A modern silicon chip factory currently costs about $2.7 billion to build. The cost of these fabrication plants (or “fabs”) are rising even as the size of the transistors are shrinking. Moore himself has said that the cost of a fab, rather than the laws of physics, may be the limiting factor in chip development.

ASU’s Ultra II program is but one facet of a much larger, much more ambitious national and corporate goal. In ways both planned and serendipitous, Kozicki and Ferry’s group is taking the next leap into the silicon chasm.

Life In The Lab
David K. Ferry is a Regents Professor of Electrical Engineering at ASU. He has authored or co-authored more than 350 articles and books in his field, and is recognized around the world for his research into nano-scale devices. He shares duties with Michael Kozicki, also a professor of electrical engineering, and current director of ASU’s Center for Solid State Electronics Research.

Ferry and Kozicki both know what makes electrons flow in transistors that are far too small to see. They also know how to train the engineers and how to coordinate large groups of researchers to achieve results not attainable by individuals.

“I’m not a specialist by any means,” Kozicki says. He considers himself a generalist. He is an engineer, not a scientist. He tends to look at the application side of things.

“I also tend to look at the ultimate manufacturability of things. For me, it’s not nearly good enough if one of these weird phenomena occurs only in a very special piece of hand-crafted lab equipment that could never be made outside,” Kozicki explains. “It’s important to all members of our group that the work eventually can be applied to mass production.”

Kozicki says that the research at ASU is “tremendously exciting because we’ve brought on a number of fairly disparate groups. The team includes many graduate students and researchers working as postdoctoral fellows. The work is coordinated with the Los Alamos National Laboratory in New Mexico, and with a small Connecticut company called Scientific Research Associates.

Each member of the group pursues one aspect of the overall project. Some researchers build actual, physical devices onto silicon. Some create new processes for building the devices. Others test simulations on computers before a single grain of sand is melted into silicon.

Computers are being used to build more complicated computers, just as science fiction writer Isaac Asimov predicted decades ago in his stories about robots. The process for making a microprocessor is incredibly complicated, often involving 20 layers of deposition and etching. As a result, even the process itself must be modeled on a computer.

“The semiconductor industry has a physical way to make things,” Ferry says. “But they also have a mathematical way in which they try to model what they make.”

Ferry says that a hierarchy of models is used. “The process model will tell us what we’ve made. That information is then used as input for the device model,” he explains. “That is where we get the device characteristics (how the transistor controls the flow of electrons)—from the structure we’ve actually made. Those characteristics then go into circuit models that tell us about circuit performance.”

One of the group’s greatest challenges is prognostication—how far into the future can they actually see? Quantum physics has been around for 60 years. According to quantum theory, at small sizes, particles stop acting like Ping-Pong balls and begin to act more like water waves. Members of the ASU research group examine these effects with computer simulations and with actual, physical devices.

Ferry says that the current generation of micro-devices exists in the 250 nanometer range, about one quarter of a millionth of a meter. In comparison, a human hair has a width of approximately 100,000 nanometers. A single human hair is about 400 times as wide as one of these new transistors, with a cross-section approximately 160,000 times as great.

For the most part, regardless of size, the flow of electrons through ultra small transistors can be understood with the same electronic theory used since the first transistor was built in 1947. But as engineers move into the smaller 70-nanometer range, troublesome quantum effects begin to appear. At such tiny levels, groups of electrons can squeeze unchecked through silicon gates like persistent rodents.

In response, members of the ASU group and 60 other research groups around the world are asking the same question. Is it possible to jump ahead to the smallest level and try to manage one electron at a time?

The ability to use a single electron to store information is a kind of Holy Grail for the electronics industry. The charge of a single electron represents the absolute limit of binary information. Information is either there or it is not; it is either one or it is zero.

Using current technology, microchips are etched on silicon by shining ultraviolet light through a stencil. The light creates a shadow and exposes regions on the silicon chip and its film-like coating. That coating is then processed further through acid baths, solvent cleanings, and additional etching. Short by most standards, the wavelength of ultraviolet light is actually too long to create devices as small as 120 nanometers. The distance between the light waves is actually bigger than the devices.

Engineers already have proven that it is possible to build very small silicon structures (not devices) on the order of 25 nanometers. However, such structures can be built only one at a time. That is not good enough for an industry that wants the ability to build as many as 1 billion transistors on a single microchip within five years.

Currently, the only technology available to make these devices is electron beam lithography. The process uses a focused beam of electrons to draw the devices. But electron beam lithography is much slower than the standard technique of shooting a snapshot with light. Ferry says that a mass move to electron beam lithography is unlikely to have a major effect on the cost of manufacturing.

Come Up and See My Etchings
Work at ASU’s Center for Solid State Electronics Research is cross-disciplinary. That fact becomes evident as one wanders the halls and talks to individual researchers.

The scientists and engineers know that a new process useful for etching lines and devices can be discovered and used without being very well understood—at least at first. But to control the process, to make it replicable, and usable in a manufacturing context requires solid theory and a deep understanding of the chemistry involved.

The ASU team needed engineers trained to understand the chemistry of vapor deposition and device construction. Solution? Bring in the experts.

Thomas Whidden was the first. An industrial researcher for Dow Chemical, Whidden had worked his entire professional life as a chemist in the semiconductor industry. He joined the ASU team to help develop the Chemically Enhanced Vapor Etching (CEVE) process for nanolithography.

Whidden has since moved on to an academic appointment in his native Canada. He was replaced in 1997 by Beatta Kardynal, a researcher from Cambridge University in England. Kardynal is trying to build actual devices using the CEVE process.

Chemically Enhanced Vapor Etching is a process that Michael Kozicki discovered almost by chance. The process offers new hope to the ASU researchers, and quite possibly to the industry as a whole.

A few years ago, Kozicki was building silicon devices when he noticed that he was not getting exactly what he expected. “Originally, we thought the process to be more a nuisance than something valuable,” he recalls.

As he worked on devices, Kozicki noticed that vapor from the oil in the pumps used to remove air from sealed treatment chambers was landing on the silicon chips. The vapor modified the processing, causing etching to occur where it was not wanted. Kozicki later realized that the vapor itself could be used to etch the silicon in areas where it was wanted.

“We discovered that we can do all sorts of things with a controlled analogue of pump oil residues,” Kozicki explains. “We can put down stuff in a controlled manner on the surface. CEVE is fairly sensitive compared to other processes being used. It’s almost like using a painter’s fine camel hair brush full of electrons.”

Whidden and Kardynal were brought in to analyze and explain the process when Kozicki did not fully understand what he had actually found. Using the CEVE process, engineers can etch incredibly fine lines and structures in silicon. Kozicki and ASU have patented the process.

CEVE works in conjunction with some natural attributes of silicon. Left alone, a silicon surface oxidizes readily and turns into silicon dioxide, just as an iron surface combines with oxygen to form iron oxide, or rust.

The surface of silicon dioxide is nonreactive and nonconductive. When used in a circuit, the material can function as an insulator. When deposited on silicon dioxide and exposed to hydrofluoric acid, portions of organic molecules such as those found in pump oil will react with the acid, causing it to eat down through the surface layer of silicon dioxide to the underlying layer of pure silicon.

In simple terms, engineers use CEVE to create patterns in the silicon. They can manipulate the patterns further by using a process called doping. Doping involves adding impurities to the silicon layer to make it more conductive to electricity. Additional layers can be added as well to create circuit lines and other structures.

Kozicki says that the process also uses very little electron beam energy. As a result, the pure silicon layer of the chip is spared damage that is typical with electron beam lithography. The best part of all: engineers can use CEVE to build extremely small structures.

The Electron Trap
Current transistors on silicon chips hold approximately 3,000 electrons. However, problems begin to occur as the devices get smaller and the number of electrons dwindles.

Ferry studies problems caused by imprecise doping. At such small sizes, he says that the impurities added to create the desired device properties are no longer effectively distributed in a random manner. As a result, the performance of a device can fluctuate in somewhat uncontrollable ways.

When crammed close together, electrons can behave like waves. The electrons can actually cancel each other out, like one water wave that goes up while another goes down, creating a flat spot. These types of effects are one of the reasons researchers are investigating the possibility of building single electron devices.

Richard Akis is an ASU research scientist. He is designing computer models of small “quantum dots.” Quantum dots are structures small enough to represent devices envisioned 10 or more years from now. Akis studies structures that range in size from 80 nanometers down to 30 nanometers. The 30-nanometer device shows the most quantum effects.

Akis found that as the size of the quantum dot decreases, a single electron gets “squeezed.” The electron spreads out like squashed silly putty. As it spreads out, the chance of the electron spontaneously escaping its confining quarters through a process called “tunneling” is a greatly increased.

Akis experiments with devices of different sizes, from larger to smaller. “This is an example of going from something that looks pretty well messed up to something that looks very ordered,” Akis says.

“We believe it represents a correspondence to what’s called a classical periodic orbit,” Akis explains. “In other words, you might have a situation where an electron gets trapped and it’s just bouncing around the four walls. We want to see what sort of correspondence there is between quantum mechanics and classical mechanics, and this seems to be like the signature of a strong relationship between classical and the quantum.”

“At this point in time, we don’t know what will be good for the device, and what will be bad,” Ferry adds. “We can spend a lot of time looking at the quantum mechanics. But what is intuitively obvious will not be obvious until you actually build the structure and look at it.”

The Road Ahead
Ferry and Kozicki are excited by the work in their laboratory. “Each generation [of microchips] will be made differently from the current generation. Research drives development which in turn drives production,” Ferry says. “The guys in development claim that the guys in research don’t know how to build anything. And the production engineers claim that the guys in development don’t know how to manufacture anything. Still, advances continue to be made.”

More advances are imminent, according to the ASU researcher.

“If you can give me 32 bits instead of 16, I can make your telephone sound a lot better,” Ferry laughs. “I could actually have the guy singing the national anthem over a hand-held telephone at a baseball game. If I can give you more computing power on the microchip, you can do more technological signal processing and make the system work better.”

In the long haul, making the system work better and smaller and cheaper is what work by Ferry, Kozicki, and their ASU team is all about. —John Svetlik